Session 14-1

A 200-μV/e- CMOS Image Sensor with 100-ke- Full Well Capacity

 

Abstract

A high sensitivity CMOS image sensor without the dynamic range (DR) trade-off has been developed by implementing the small floating diffusion (FD) capacitance in the lateral overflow integration capacitor (CS) embedded pixel circuit. A 1/4-inch VGA chip fabricated through 0.18-um 2P3M process achieves 200-uV/e- conversion gain with 100-ke- full well capacity, 2.2-e-rms noise floor and 93-dB DR. The S/N ratio degradation at the detection node switch from FD to FD+CS is not visible.