Session 6-3

A 2.2 Gb/s DQPSK Baseband Receiver in 90-nm CMOS
for 60 GHz Wireless Links

 

Abstract

This paper presents a CMOS DQPSK direct-conversion baseband receiver that can deliver 2.2 Gb/s data rate to support 1920*1080 interlaced HDTV wireless transmission in the unlicensed 60 GHz band. The receiver system architecture and major circuit blocks are described. Implemented in the 90nm CMOS process, the receiver achieves a maximum data rate of 2.4 Gb/s with measured BER of 1e-9. It is operated under 1V DC supply voltage with 85 mW of total power consumption.