Session 10A-3
Manufacturability and Speed Performance Demonstration
of Porous ULK (k=2.5) for a 45nm CMOS Platform
Abstract
| A full ULK (Ultra Low-k) integration using TFHM (Trench First Hard Mask) architecture [1] is demonstrated in a high density CMOS 45nm device. 130nm-pitch metal features have been resolved using a 193nm immersion hyper-NA (Numerical Aperture) scanner and an optimized OPC (Optical Proximity Correction) model. RC performance and yield results are presented for a fully-integrated 45nm ULK backend. An overall speed performance enhancement of >10% has been confirmed within a microprocessor application at the 65nm technology node when replacing Low-k dielectric (k=2.9) with ULK (k=2.5) material. |