Session 11A-1

High-Performance High-κ/Metal Gates for 45nm CMOS
and Beyond with Gate-First Processing

 

Abstract

We report the first demonstration of improved short channel control with band edge BE nFET high k and metal gate HKMG devices integrated in a gate first scheme with stress liners on SOI substrates for the 45nm node and beyond enabled by Tinv 12A. Integration of HKMG nFETs into CMOS devices yielded large SRAM arrays. We show the first BE HKMG pFETs fabricated with gate first high thermal budget processing with thin Tinv 13A and appropriate pFET Vts.