Session 7B-4

Advantages of a New Scheme of Junction ProfileEngineering with Laser Spike Annealing
and ItsIntegration into a 45-nm Node High PerformanceCMOS Technology

 

Abstract

We have developed a novel junction profile engineering using laser spike annealing (LSA); LSA is implemented prior to spike-RTA to modulate the junction profile. With this technique, we can improve the performance of MOSFETs more effectively than conventional ways of LSA applications. And, it enables us to use lower LSA temperatures with wide process window because of its low sensitivity to the LSA temperatures for a certain range, while the conventional ways require ultra high temperatures to improve the device performance. We applied this technique to 45-nm node high performance (HP) CMOS devices with a gate length of 32-nm. A reduction in the source-drain parasitic resistance achieves 8.8% / 5% of improvements in the saturation on-current (Ion) for PMOS / NMOS, and Ion = 750(P) / 1030(N) [uA/um] for Ioff = 100 [nA/um] at Vdd= 1.0V. We also demonstrate the advantages of this technique using the performance of ring oscillators, SRAM yields and the accuracy of precision poly resistors from the LSI manufacturability point of view.