Session 9A-3

Addressing Key Concerns for Implementation of Ni FUSI
into Manufacturing for 45/32 nm CMOS

 

Abstract

Key remaining concerns raised for implementation of Ni FUSI into manufacturing are addressed and solved suggesting that Ni FUSI is worthy for manufacturing. We studied NiSi, Ni2Si and Ni31Si12 FUSI gates and their CMOS integration showing excellent reliability (NBTI, PBTI and TDDB) on HfSiON, strong effect of N (DPN HfSiON) finding optimal point in NMOS/PMOS BTI trade-off. No Ni penetration into substrate and no additional reliability degradation with multilevel metallization BEOL thermal budget. Excellent mismatch characteristics and low Vt, no FUSI grain orientation effects. Excellent EOT scalability with no PMOS VFB roll-off down to EOT~0.7 nm. SRAM defectivity analysis finding main type of defects and solutions for their elimination.