Session 11-2

Post-Silicon Tuning Capabilities of 45nm
Low-Power CMOS Digital Circuits

 

Abstract

Adaptive circuit techniques enable modification of power-performance efficient circuit operation. Yet it is unclear if such techniques remain effective in modern deep-submicron CMOS. In this paper we examine the technological boundaries of supply voltage scaling and body biasing in 45nm low-power CMOS. We demonstrate that there exists an effective tuning range for power-performance and performance variability control. Our analysis is supported by ring oscillator test-chip measurements.