Session 11-4

Tunable Duplex LSIs Achieved by Multiple Phase-Modulated Clocks Capable of Predicting Delay-Increase and -Decrease Faults

 

Abstract

We propose a novel architecture for predicting faults based on a duplex system. It can predict delay-increase as well as delay-decrease faults by using tunable multiple phase-modulated clocks. After prediction, it disconnects faulty blocks and continues correct operations. The experimental results from a 90-nm test chip demonstrated correct operations and revealed a reduction in the failure rate by about one twelfth while there was a 28% area overhead compared to a conventional duplex circuit.