Session 12-2

A 1.3GHz 350mW Hybrid Direct Digital Frequency
Synthesizer in 90nm CMOS

 

Abstract

This paper presents a 1.3GHz low power hybrid direct digital frequency synthesizer (DDFS) fabricated in 90nm CMOS. The proposed hybrid design extends the resolution of the nonlinear DAC by adding a linear slope component to the sine approximation via an additional linear DAC. This 11-bit DDFS produces a minimum SFDR of 52dBc up to Nyquist at 1.3GHz while dissipating only 350mW and occupying 2mm^2 including pads. The FOM of this chip is measured at 1201GHz.ENOB/W.