Session 8-4

32-Mb 2T1R SPRAM with localized bi-directional write driver and '1'/'0' dual-array equalized reference cell

 

Abstract

32-Mb SPRAM chip was demonstrated with an access time of 32 ns and a cell write-time of 40 ns. The chip was fabricated with 150-nm CMOS and a 100 x200 nm TMR device. It features a 2T1R type memory cell for achieving sufficient write current despite the small cell size, compact hierarchy bit/source-line structure with localized bi-directional write driver for efficiently distributing the writing current, and '1'/'0' dual-array equalized reference cell for stable read.