Session 9-4

A Scalable 3D Processor by Homogeneous
Chip Stacking with Inductive-Coupling Link

 

Abstract

This paper presents homogeneous chip stacking to construct a scalable three-dimensional (3D) processor for the first time. Chips are connected by an inductive-coupling link. Power supply is delivered by conventional wire bonding. A prototype is developed by stacking four dynamically reconfigurable processor (DRP) chips in 90nm CMOS. Active Si area for the vertical link at 7.2Gb/s/chip is 0.023mm2. Average execution time is reduced to 31% compared to that using one chip.