Session 11A-2
A Highly Manufacturable 28nm
CMOS Low Power Platform Technology
with Fully Functional 64Mb SRAM Using Dual
/Tripe Gate Oxide Process
| For the first time, we present good yielding 64Mb SRAM with the smallest cell (0.127um2) in 28nm node. The low power technology platform extends SiON/poly technology beyond 32nm node with gate density of 2.3X higher than that of 45nm, and integrates full SOC components and Cu-low-k interconnect. Simultaneously available LSTP and LOP transistors provide 25-40% speed gain or 30-50% power reduction over prior 45nm technology. Device mismatch and 1/f noise are comparable or better than HK/MG reported. |