Session 11B-1

High-Density and High-Speed 128Mb Chain FeRAM
with SDRAM-Compatible DDR2 Interface

Abstract
 Novel cell technologies are successfully developed for the highest-density and highest-speed 128Mb FeRAM with SDRAM-compatible 1.6GByte/s DDR2 interface. To overcome the signal window reduction due to the capacitor shrinkage, new cell technologies such as half-pitch layout with triangular capacitors, advanced nestled chain structure, high-density cover film and low-damage etching technique are established. With these new technologies, the cell signal window reaches 380 mV, which is sufficient for stable 128Mb 1T1C operation.