Session 12A-3

Vertical Capacitor-less Thyristor Cell
for 30nm Stand-alone DRAM

Abstract
Vertical double gate floating body DRAM (FB DRAM) cells with transistor- and thyristor structures have been fabricated using a 65nm buried wordline DRAM technology. The cell operation for the two concepts is compared. The vertical thyristor cell shows low cell operation voltages, resulting in the best cell retention reported so far for feature sizes of ~ 60nm and an excellent scaling capability.