Session 3A-1

Gate First High-k/Metal Gate Stacks
with Zero SiOx Interface Achieving EOT=0.59nm for 16nm Application

 

Abstract

Gate first 0.59nm EOT HfOx/metal gate stacks for 16 nm node application are demonstrated for the first time. By controlling O during HfOx deposition, "zero" low-k SiOx interface (ZIL) forms despite a 1020C activation anneal. This 0.59nm EOT is a 30% improvement over a state of the art 32nm HK/MG technology. We compare and demonstrate for the first time the improved scalability of ZIL HfOx vs. exotic higher-k. Transistors made with ZIL HfOx show good interfaces (SS=70-80 mV/dec, Nit=5E10/cm2) and performance (10% Ion-Ioff boost vs. EOT=0.95nm), despite mobility loss. Factors contributing to mobility loss in ZIL HfOx are discussed.