Session 3B-1

New Insights into Oxide Traps Characterization
in Gate-All-Around Nanowire Transistors
with TiN Metal Gates Based on Combined Ig-Id RTS Technique

 

Abstract

By using combined gate current and drain current random telegraph signal noise (Ig-Id RTS) technique, both electron and hole traps within the gate stack of silicon nanowire transistors (SNWTs) with TiN metal gates are experimentally studied in this paper. For the first time, Ig RTS is observed in p-SNWTs. Ti is demonstrated that this combined Ig-Id RTS technique can be used to separately investigate the properties of electron and hole traps in SNWTs and other advanced MOSFETs. Trap parameters in SNWTs are also extracted and discussed.