Session 8A-4

Reduction of RTA-Driven Intra-Die
Variation via Model-Based Layout Optimization

Abstract

Unique hybrid approach employing both model-based layout optimization and process improvement was successfully developed for reducing Rapid Thermal Anneal (RTA) driven intra-die variations. It has been applied to multiple bulk and SOI designs. The model developed herein enables fast estimation of broad-band reflectance of a random layout in 65, 45, and 32nm nodes and guides reflectance leveling in the post-design phase. This approach significantly reduces RTA-driven variations showing 30% reduction in intra die ring oscillator range.