Session 12-3

A 22-mW 7b 1.3-GS/s Pipeline ADC
with 1-bit/stage Folding Converter Architecture

 

Abstract

We have developed a 7-b 1.3-GSa/s 1-bit/stage pipeline ADC with a folding characteristic that uses a polarity selecting technique. The ADC achieves an ENOB of 6.5-b and consumes only 22 mW from 1.2V supply. These results yield a figure of merit (FOM) of 190-fJ/conv.-step. It is implemented in 45-nm CMOS technology and occupies a core area of 0.023 mm2.