Session 25-4

A Reconfigurable 1GSps to 250MSps, 7-bit to 9-bit Highly Time-Interleaved Counter ADC in 0.13µm CMOS

 

Abstract

A reconfigurable highly time-interleaved ADC is realized by combining 128 counter ADCs and a global ramp-generator based on a rotating figure-of-8 resistor ring. Implemented in 0.13µm CMOS, the ADC can be configured in real-time as a 1GSps 7-bit, 500MSps 8-bit, and 250MSps 9-bit converter. It achieves sub 400fJ/step in all these configurations.