Session 4-2

A 32nm, 1.05V, BIST enabled, 10-40MHz, 11-9 bit,
0.13mm² digitized integrator MASH DS A/D converter

 

Abstract

A 11-9 bit, 10-40MHz DS A/D converter with a digitized integrator (DI) MASH structure with a low swing feed-forward architecture to allow for scalable, portable, and reconfigurable ADC in 32nm CMOS process using all minimum channel length transistors. An on-chip SNR calculator allows high volume sort testing on a digital tester; startup automatic offset and reference calibration to prevent integrator overload due to manufacturing variations, and compensation for finite opamp gain.