Session 5-2

Isolation Techniques against Substrate Noise Coupling Utilizing
Through Silicon Via (TSV) for RF/Mixed-Signal SoCs

 

Abstract

Isolation techniques against substrate noise coupling utilizing TSV processes are proposed. The TSV encloses the RF circuit on a SoC chip to improve the isolation between digital circuits and the RF circuit without constraints of on-chip interconnect above the TSV. Various test patterns are fabricated on a CMOS 10ohm-cm silicon substrate. The combinational pattern with TSV, DTI and HR layer shows 60dB improvement of the isolation. Both simplified model and mesh equivalent model are well matched with measurement results.