Session 8-1

An 8x10-Gb/s Source-Synchronous I/O System
Based on High-Density Silicon Carrier Interconnects

 

Abstract

A serial I/O chip set in 45nm SOI CMOS is mounted via 50um pitch micro-C4 bumps to a silicon carrier and communicates over ultra-dense interconnects with pitches of between 8um and 22µm. With DFE-IIR RX equalization, data is received over distances up to 6cm with channel losses as high as 16.3dB. The energy efficiency is better than 6.1pJ/bit.