Session 8-4

A 0.12mm² 5Gbps Reciever with a Level Shifting Equalizer
and a Cumulative-Histogram-Based Adaptation Engine

 

Abstract

A 0.12mm2 5Gbps receiver with an adaptive equalizer was presented. To minimize the equalizer area, a source- input front-end performing level shift and equalization is proposed. An adaptation algorithm finds an optimal equalizer setting by observing the cumulative histogram of the equalizer-output amplitude, reducing the hardware cost. A test chip was fabricated in a 65-nm CMOS. It achieved the equalization of 20dB transmission loss with a BER less than 10-12 while consuming 33mW at 1.2V.