Session 7-3

Unified Understanding of V_th and I_d Variability
in Tri-Gate Nanowire MOSFETs

 

Abstract

We systematically study Vth and Id variability of nanowire transistors. The universal line appears in Pelgrom plot for a wide range of gate length, nanowire width and height. Deviation of the narrowest transistor from the universal line was eliminated by suppressing the parasitic resistance. Avt of nanowire transistors is lower than planar transistors due to gate grain alignment. Improvement of roughness limited mobility and its fluctuations are essential to reduce Idsat and Idlin variations.