Session 21 – TAPA II

DC-DC Converters

Friday, June 15, 1:30 p.m.

Chairpersons: T. Burd, AMD

M. Takamiya, University of Tokyo

21.1 - 1:30 p.m.

A 50nA Quiescent Current Asynchronous Digital-LDO with PLL-Modulated Fast-DVS Power Management in 40nm CMOS for 5.6 times MIPS Performance, Y.-H. Lee, S.-Y. Peng, C.-H. Wu, C.-C. Chiu, Y.-Y. Yang, M.-H. Huang, K.-H. Chen, Y.-H. Lin*, S.-W. Wang, C.-Y. Yeh*, C.-C. Huang*, C.-C. Lee*, National Chiao Tung University, *Realtek Semiconductor Corp.

A 50nA quiescent current asynchronous digital-LDO (DLDO) integrated with the PLL-modulated switching regulator (SWR) exhibits the hybrid power management operation. The proposed bidirectional asynchronous wave pipeline (BAWP) in the asynchronous DLDO realizes the Fast-DVS (F-DVS) operation within tens of nano-seconds. The SWR with the leading phase amplifier achieves on-the-fly DVS and 94% peak efficiency, as well as improves 5.6 times MIPS performance through hybrid operation. The fabricated chip occupies 1.04mm2 in 40nm CMOS.

21.2 - 1:55 p.m.

High Area-Efficient DC-DC Converter using Time-Mode Miller Compensation (TMMC), S.-W. Hong, T.-H. Kong, S. Jung, Su.-W. Lee, S.-W. Wang, J.-P. Im, G.-H. Cho, KAIST

For the controller design of a DC-DC converter, a Time-Mode Miller Compensation (TMMC) is introduced in this paper. Using this concept, the consuming area of the DC-DC converter can be significantly reduced without any off-chip compensation components. The chip is implemented in 0.18μm I/O CMOS whose size is similar to 0.35μm CMOS, and the core size of this work is only 0.12mm2. Peak efficiency is 90.6%, with switching frequency of 1.15MHz.

21.3 - 2:20 p.m.

A 900mA 93% Efficient 50μA Quiescent Current Fixed Frequency Hysteretic Buck Converter Using a Highly Digital Hybrid Voltage- and Current-mode Control, Q. Khan, A. Elshazly, S. Rao, R. Inti, P. Hanumolu, Oregon State University

A hysteretic buck converter employs a hybrid voltage/current mode control to regulate output voltage and switching frequency independently. Fabricated in 130nm CMOS process,the prototype consumes only 50μA quiescent current and operates at a constant switching frequency of 1MHz over a wide range of output voltages (0.7-to-1.8V) and inductor values (1-to-5μH) with a peak efficiency of 93% at 900mA load current. The output ripple and the settling time of the converter are less than ±2.5mV and 10μs, respectively.

21.4 - 2:45 p.m.

A 198-ns/V V_O-Hopping Reconfigurable RGB LED Driver with Automatic ΔV_O Detection and Quasi-Constant-Frequency Predictive Peak Current Control, Y. Zhang, H. Chen*, D. Ma, University of Texas at Dallas, *Linear Technology Corporation

A CMOS RGB LED driver is presented, adopting a single-converter, reconfigurable structure to adaptively bias RGB color LEDs in high precision. Automatic ΔVO detection and fast VO-hopping techniques are proposed, achieving 198-ns/V VO-hopping speed on 0.35µm CMOS. This is at least one order faster than the state-of-arts. While predictive peak current control and burst-mode operation are employed for robust operation, switching frequency is still stabilized around 1MHz by an adaptive off-timer for switching noise spectrum control. The driver consumes 8.6 times less headroom power than its fixed-output

counterparts.