Session 5 – Honolulu Suite

Ultra Low Power Radios

Wednesday, June 13, 1:30 p.m.

Chairpersons: G. Van der Plas, IMEC

K. Agawa, Toshiba Corp.

5.1 - 1:30 p.m.

A 440pJ/bit 1Mb/s 2.4GHz Multi-Channel FBAR-based TX and an Integrated Pulse-shaping PA, A. Paidimarri, P. Nadeau, P. Mercier, A. Chandrakasan, Massachusetts Institute of Technology

A 2.4GHz TX in 65nm CMOS defines three channels using three high-Q FBARs and supports OOK, BPSK and MSK. The oscillators have −132dBc/Hz phase noise at 1MHz offset, and are multiplexed to an efficient resonant buffer. Optimized for low output power ~ −10dBm, a fully-integrated PA implements 7.5dB dynamic output power range using a dynamic impedance transformation network, and is used for amplitude pulse-shaping. Peak PA efficiency is 44.4% and peak TX efficiency is 33%. The entire TX consumes 440pJ/bit at 1Mb/s.

5.2 - 1:55 p.m.

An 8-PPM, 45 pJ/bit UWB Transmitter with Reduced Number of PA Elements, V. Majidzadeh, A. Schmid, Y. Leblebici, J. Rabaey*, EPFL, *University of California, Berkeley

An impulse radio ultra wideband (IR-UWB) transmitter (Tx) using finite impulse response synthesis of the raised-cosine pulse is presented. Symmetric pulse combining technique is proposed to reduce the number of power amplifier elements by half. A novel all-digital delay locked loop (AD-DLL) serves as an 8-array pulse position modulator (PPM) for aggressive duty-cycling of the Tx. The chip is fabricated with 90nm CMOS technology and consumes 540 μW from 1 V power supply resulting in 45 pJ/bit energy efficiency with -26 dBm of output

power.

5.3 - 2:20 p.m.

An All 0.5V, 1Mbps, 315MHz OOK Transceiver with 38-µW Career-Frequency-Free Intermittent Sampling Receiver and 52-uW Class-F Transmitter in 40-nm CMOS, A. Saito, K. Honda*, Y. Zheng*, S. Iguchi*, K. Watanabe, T. Sakurai*, M. Takamiya*, STARC, *University of Tokyo

An all 0.5V, 1Mbps, 315MHz OOK transceiver in 40-nm CMOS for a body area network is developed. Both a 38-pJ/bit career-frequency-free intermittent sampling receiver with -55dBm sensitivity and a 52-pJ/bit class-F transmitter with -21dBm output power achieve the lowest energy in the published transceivers for wireless sensor networks.

5.4 - 2:45 p.m.

A 2.4GHz Hybrid PPF Based BFSK Receiver with ±180ppm Frequency Offset Tolerance for Wireless Sensor Networks, R. Ni, K. Mayaram, T. Fiez, Oregon State University

A low-power 2.4GHz 1Mb/s hybrid polyphase filter (PPF) based BFSK receiver with +/-180ppm frequency offset tolerance (FOT) and 40dB adjacent channel rejection (ACR) at a modulation index (MI) of 2 is presented for medium-rate wireless sensor networks (WSNs). High FOT at low MI is achieved by a frequency-to-energy conversion architecture using PPFs without any frequency correction. The proposed hybrid topology of the PPF provides an improved ACR at reduced power. The prototype receiver fabricated in a 0.13um CMOS process, including RF and analog front-ends, consumes 1.95mW from a 1V supply with -84dBm sensitivity. Excellent FOT and ACR are achieved for ultra-low baseband power with the proposed receiver. This relaxes the frequency accuracy requirement and improves the radio co-existence in the presence of interferers, reducing the power and cost of WSN links.