Session 5 – TAPA 2

Alternative Memory

 

Tuesday, June 12, 1:30 p.m.

Chairs:                  K. Attenborough, NXP Central R&D

                                S. Choi, Samsung Electronics Co., Ltd.

 

 5.1 - 1:30 p.m.

Scalable 3-D Vertical Chain-Cell-Type Phase-Change Memory with 4F2 Poly-Si Diodes, M. Kinoshita, Y. Sasago, H. Minemura, Y. Anzai, M. Tai, Y. Fujisaki, S. Kusaba, T. Morimoto, T. Takahama, T. Mine, A. Shima, Y. Yonamoto, T. Kobayashi, Hitachi, Ltd.

 

A scalable 3-D VCCPCM with 4F2 poly-silicon diode was fabricated and successfully demonstrated set, reset, and reading operation. Implementing this PCM device can reduce bit cost compared to flash memory.

 

5.2 - 1:55 p.m.

Varistor-type Bidirectional Switch (JMAX>107A/cm2, Selectivity~104) for 3D Bipolar Resistive Memory Arrays, W. Lee, J. Park, J. Shin, J. Woo, S. Kim, G. Choi, S. Jung, S. Park, D. Lee, E. Cha, H.D. Lee*, S.G. Kim*, S. Chung*, H. Hwang, Gwangju Institute of Science and Technology, *Hynix Semiconductor Inc.

 

We demonstrate a varistor-type bidirectional switch (VBS) with excellent selection property for future 3D bipolar resistive memory array. A highly non-linear VBS showed superior performances including high current density (>3x107A/cm2) and high selectivity (~104). The non-linear I-V characteristics can be explained by varistor-type multi-layer tunnel barriers, which were formed by Ta incorporation into thin TiO2. Furthermore, the 1S1R device showed excellent suppression of leakage current (>104 reduction) at 1/2VREAD, which is promising for ultra-high density resistive memory applications.

 

5.3 - 2:20 p.m.

Nonvolatile 32x32 Crossbar Atom Switch Block Integrated on a 65 nm CMOS Platform, N. Banno, M. Tada, T. Sakamoto, K. Okamoto, M. Miyamura, N.Iguchi, T. Nohisa, H. Hada, LEAP

 

A 32x32 crossbar complementary atom switch (CAS) block has been successfully integrated in a 65nm-node CMOS platform without degrading CMOS properties. The CAS connecting to two Cu lines at each edge is composed of a dual layered electrolyte of TiO2/polymer, which prevents Cu oxidation during the fabrication of the switch and Cu BEOL. The reduction of Cu-surface roughness and the electric field concentration at the edge of Cu electrode enable a high Ion/Ioff  ratio and a low programming voltages of 1.8V with distribution as low as σ=0.2V.

 

5.4 - 2:45 p.m.

Large-Scale (512kbit) Integration of Multilayer-Ready Access-Devices Based on Mixed-Ionic-Electronic-Conduction (MIEC) at 100% Yield, G.W. Burr, K. Virwani, R.S. Shenoy, A. Padilla, M. BrightSky*, E.A. Joseph*, M. Lofaro*, A.J. Kellock, R.S. King, K. Nguyen, A.N. Bowers, M. Jurich, C.T. Rettner, B. Jackson, D.S. Bethune, R.M. Shelby, T. Topuria, N. Arellano, P.M. Rice, B.N. Kurdi, K. Gopalakrishnan, IBM Almaden Research Center, *IBM TJ Watson Research Center

 

BEOL-friendly Access Devices (AD) based on Cu-containing MIEC materials are integrated in large (512x1024) arrays at 100% yield,  and are successfully co-integrated together with Phase Change Memory (PCM). Numerous desirable attributes are demonstrated: the large currents  (>200uA) needed for PCM, the bipolar operation required for  high-performance RRAM, the single-target sputter deposition essential  for high-volume manufacturing, and the ultra-low leakage (<10 pA)  and high voltage margin (1.5V) needed to enable large crosspoint arrays.