Session 7A-3

Highly Manufacturable FinFETs with Sub-10nm Fin Width and High Aspect
Ratio Fabricated with Immersion Lithography

 

Abstract
FinFET scalability, performance and variability are investigated with sub-10nm fin width and high aspect-ratio, manufactured by conventional immersion lithography and etch. Fin width scaling results in excellent SCE immunity. Narrow fin access resistance is demonstrated to be a critical issue, requiring SEG and careful control of dopant engineering to avoid defectivity after re-crystallization. For short gates, VT variability is dominated by Lg variation. For long gates and narrow fins, fin width roughness affects linear VT.