Session 8B-3

Gate-All-Around Twin Silicon Nanowire SONOSMemory

 

Abstract

We have developed GAA SONOS with ultra thin twin silicon nanowires for the first time. By using CHEI and HHI, program speed of 1 us at Vd=2 V, Vg=6 V and erase speed of 1 ms at Vd=4.5 V, Vg=-6 V are achieved with 2~3 nm nanowire and 30 nm gate. Nanowire size below 10 nm dependencies on Vth shift and the P/E characteristics are investigated. As nanowire diameter decreases, faster program speed and larger Vth shift are observed.