Session 7B-3

Novel Thin Sidewall Structure for High Performance Bulk CMOS
with Charge-Assisted Source-Drain-Extension

 

Abstract
We have developed a novel junction profile engineering using thin sidewall structure and applied it to sub-40 nm uniaxial strained CMOS devices. This transistor used a high-k thin sidewall with electrical charge in achieving a higher drive current with keeping the short channel effect. Consequently, the 18.5/15.6 % reduction of parasitic resistance achieve the 8.2/13.0 % improvement in the saturation current (Ion) for nMOS and pMOS. A high performance Bulk nMOS and pMOS were demonstrated with Ion of 1069 uA/um and 725 uA/um at Vdd=1 V / Ioff=100 nA/um, respectively.