2005 VLSI Circuits Short Course Program
"Multi-GHz Clocking Technologies for Microprocessors"
Wednesday, June 15, 2005 (Suzaku)
Organizers/Chairs: |
Makoto Nagata, Kobe University
Vivek De, Intel Corp.
|
8:30 |
Opening |
8:40 |
Basics of High Performance Clock Delivery
Keng Wong, Intel Corp. |
9:50 |
Break |
10:10 |
High Frequency Clock Distribution and Resonant Clocking
Phillip Restle, IBM |
11:10 |
PLL’s, VCO’s, DLL’s & Delay Elements
Greg Taylor, Intel Corp. |
12:20 |
Lunch |
14:00 |
Clock Timing Adjustment With Genetic Algorithms
Tetsuya Higuchi, AIST, Japan |
14:50 |
Techniques for Synchronizing Multiple Clock Domains
Masayuki Mizuno, NEC |
15:40 |
Break |
16:00 |
Clock Methodology for Low Power Design
Michio Komoda, Renesas Technology Corp. |
16:50 |
Closing |
|