---new concepts and breakthroughs in VLSI devices and processes
---new functional devices including quantum effect devices with possible VLSI implementation
---materials innovation for MOSFET and interconnect in VLSI
---advanced lithography and fine patterning technologies for high density VLSI
---process/device modeling of VLSI devices
---packaging and reliability of VLSI devices
---theories and fundamentals related to the above devices
---new concepts and technologies for VLSI manufacturing

As a new special session, "FOCUS SESSION, DFM/DFY Technologies" will be held on June 13, 2007, which consists of invited talks. Paper submission in this area is also welcome.

For the Circuits Symposium:
The 2007 Symposium on VLSI Circuits will provide the designers of integrated circuits an opportunity to meet and present important new work at an international forum. The three day Symposium will continue the successful format and atmosphere established by the previous meetings, and partially overlap the 2007 Symposium on VLSI Technology, which is being held at the same hotel.

---digital circuits and systems: such as architectures, low-power, processors, ASIC, FPGAs, etc.
---analog and mixed signal circuits: such as A/D and D/A converters, amplifiers, filters, RF, interface circuits, etc.
---memory circuits: such as static memory, non-volatile memory, cache memory, dynamic memory, and new concepts in memories based on quantum mechanics effects, magnetism, polymers, etc.
---system architecture, circuits and building blocks for wireless and wireline, multi-media, and networking applications
---circuits, functional blocks using quantum dots, MEMS, sensors, etc.
---fundamentals related to the above, including design automation tools, innovative circuits and device structures

The emphasis will be on VLSI circuits. In addition to papers addressing transistor-level circuits, the conference also welcomes submissions addressing large-scale system level concerns as they affect circuits, including system architecture, system-to-device interaction in digital design, and the impact of technology scaling on performance, area and power of complex SoCs. Papers will be considered on the basis of originality and quality. Implementation in a semiconductor chip and measured results are not mandatory. They are required only when feasibility of the presented circuit is not clear by simulations alone, as in the case for most analog submissions. It is understood that papers in new areas are likely to contain less quantitative evaluations than those in more established areas.