Welcome to the 2004 Symposium on VLSI Technology On behalf of the organizing Committees, you are cordially invited to attend the 2004 Symposium on VLSI Technology to be held from June 15-17 in Honolulu, Hawaii. BR> This Symposium has established itself as one of the most prestigious international forums for presenting the latest research and development in the area of VLSI technologies and their applications. This year we had a record number of 304 papers submitted from all over the world. From these excellent submissions, we selected 96 very high quality papers, and organized them into 23 sessions. We are also delighted to have two distinguished Invited Speakers for the Plenary Session. Dr. Henry Samueli of Broadcom, will speak on “Connection Everywhere: The Technology Challenges” and Dr. Chenming Hu, Taiwan Semiconductor Manufacturing Company, will address "Device Challenges and Opportunities". Three Rump Sessions are planned for the evening of June 16 as a means to facilitate informal discussions among researchers. One is a joint session with the Symposium on VLSI Circuits which will address "What’s Beyond the Planar MOSFET?". The other two are regular sessions, and will cover specific technology related topics of timely interest; 1) Is DRAM Dead? Will Flash Rule the World? 2) Strained Si for Enhanced CMOS performance A one-day Short Course, scheduled for Monday June 14, will cover " Emerging Nano-Electronic Technologies: Scaling MOSFETs to the Ultimate Limits and Beyond-MOSFET Approaches. This should be an excellent opportunity for experienced as well as new engineers to broaden their technical base. The symposium registration fee covers all of the sessions including the Rump Sessions. Coffee breaks and the Tuesday night banquet are also included. Registration for the Short Course is extra. The detailed registration fees and hotel reservation schedules are included in the Advance Program. As in past years, we expect a strong participation from leaders of VLSI industry and academic researchers. We look forward to an exciting Symposium in Honolulu. Please join us. Bob Havemann Shin'ichiro Kimura Program Chair Program Co-Chair CONFERENCE SCHEDULE Sunday, June 13 5:00p-7:00p Registration Monday, June 14 7:30a-5:00p Registration 8:00a-5:15p Short Course 6:00p-8:00p Reception Tuesday, June 15 7:30a-5:00p Registration 8:15a-10:05a Session 1 Welcome and Plenary Session 10:20a-12:00p Session 2 Advanced CMOS Technology Session 3 Emerging Memory Technologies 1:30p-3:10p Session 4 DRAM I Session 5 Advanced Transistor Technology I 3:25p-5:05p Session 6 Strain Enhanced CMOS Session 7 Advanced Interconnects 7:00p-9:00p Banquet - Luau Wednesday, June 16 7:30a Registration 8:00a-10:05a Session 8 Flash Memory I Session 9 Advanced Transistor Technology II 10:30a-12:00p Session 10 Analog/RF Devices I Session 11 High k Dielectric Technology 1:30p-3:10p Session 12 Device Characterization/Modeling Session 13 DRAM II 1:30p-3:10p Session 14 Gate Dielectric Reliability Session 15 Emerging Memory Technologies II 8:00p-10:00p Rump Sessions Thursday, June 17 7:30a-5:00p Registration 8:00a-10:05a Session 16 Advanced Transistor Technology III Session 17 Process Technology 10:30a-12:25p Session 18 Advanced Metal Gate Materials Session 19 Novel Device Concepts 1:30p-3:10p Session 20 High k Transistor Reliability Session 21 Analog/RF Devices II 3:25p-5:05p Session 22 Advanced CMOS Technology II Session 23 Flash Memory II