2012 VLSI Technology Short Course Program
“14nm CMOS Technology & Design Co-Optimization
and Emerging Memory Technologies
”
Monday, June 11, 2012

Chairs: |

Mukesh V. Khare, IBM Corp.
Masame Hane, Renesas
|

8:10 a.m. |

Introduction |
| 8:15 a.m. |
FinFET – History Fundamentals and Future,
T-J King Liu, UC Berkeley |
| 9:25 a.m. |
FinFET Design Enablement – Foundry Perspective
B. Sheu, TSMC |
| 10:35 a.m. |
Break |
| 10:50 a.m. |
Heterogeneous CMOS Integration
S. Takagi, Univ. of Tokyo |
| 12:00 p.m. |
Lunch |
| 1:30 p.m. |
Interconnect Technology (Design, Reliability & RC)
M. Angyal, IBM |
| 2:40 p.m. |
Break
|
| 2:55 p.m. |
Advanced Patterning (Design Perspective)
H. Levinson, GLOBALFOUNDRIES |
| 4:05 p.m. |
Emerging Memory Technology
G. H. Koh, Samsung |
| 5:15 p.m. |
Conclusion |
|