VLSI Symposia | Technology

8:30 am | Introduction: VLSI Implications of the Internet of Things, G. Yeric, ARM

Logic Nano-Device Enablers for Emerging IoE Applications & The Role of Ultra-Low Leakage Switch, A. Thean, IMEC
Abstract: Widespread adoption of IoT technologies, from medical devices and wearables through home and industrial automation, will dramatically change the way we interact with the world around us. These new systems will need to be largely autonomous, requiring control systems that are able to take data from sensors, process it, and modify actuators with minimal human intervention. The integration of compute, sensing, energy harvesting and communication to the cloud necessitates the integration of many new VLSI technologies, including analog, RF and MEMS, in order to efficiently address the needs of these future applications. This talk will explore applications in IoT and their VLSI technology implications.

Bio: Greg Yeric earned his BSEE, MSEE, and PhD in Microelectronics at The University of Texas at Austin, in 1987, 1989, and 1993, respectively. Dr. Yeric began his career at Motorola's Advanced Products Research and Development Laboratories in the area of semiconductor process integration, subsequently working at TestChip Technologies, HPL Technologies, and Synopsys, all in the areas of test structures, technology development, and yield analysis. He is currently a Senior Principal R&D engineer at ARM holdings, focusing on design-technology co-optimization and predictive technology.

9:30 am | More Moore

Logic Nano-Device Enablers for Emerging Applications & The Role of Ultra-Low Leakage Switch, A. Thean, IMEC
Abstract: A new information super-structure is emerging as we move into the era of Internet of Everything (IoE). With the orders of magnitude increase in connected devices, future networks are expected to evolve differently from today's internet. There is an anticipated need for more hierarchy of distributed intelligence, to manage the massive telemetry data generation. Device technologies can play an important role to customize the power, functionality, and cost metrics for applications at each level of the hierarchy, from the Cloud, Fog, to the Swarm.
In this talk, we will broadly review the concepts of device leakage design and the minimum energy operating point for the varied circuit switching activities needed throughout the emerging IoE infrastructure. As we compare recent CMOS device technologies (28nm, 20nm, 14nm, 10nm), we will also examine the relevance of emerging devices (TFETs, NEMs, Spintronics, etc.) heterogeneously married with base CMOS logic to provide power and functionality specializations for the upcoming IoE infrastructure.

Bio: Dr. Aaron Thean is the Vice President of Logic Process Technologies and Director of the Logic Devices Research at IMEC. He directs device and process R&D ranging from ultra-scaled FinFETs to III-V/Ge Channels, emerging nano-device architectures, logic spintronics, and novel materials. Prior to joining IMEC, Aaron had held technology management positions at Qualcomm (San Diego, California) and IBM (East-Fishkill, New York). As an Engineering Manager at Qualcomm, he worked closely with process and design teams on 20nm technology. At IBM, he led the international process alliance team, as the 32nm/28nm device manager, to develop the first foundry-compatible Gate-First High-k Metal Gate bulk CMOS process for IBM and its technology partners. Aaron started his engineering/scientific career at Motorola/Freescale – Austin, Texas, where he became the manager of the Novel Devices Group. An alumnus of the University of Illinois at Champaign-Urbana, he received his B.Sc, M.Sc, and Ph.D degrees in Electrical Engineering. He has published over 100 papers in leading journals and conferences and holds more than 50 technology patents.

Promising Candidates of Embedded, Low-Power Memory for IoT LSIs, S. Kimura, Hitachi, Ltd.
Abstract: The Internet of Things is considered to be the next boost for LSI industries. A large number of things, which have never been connected to the Internet before, will be connected to it by LSIs equipped with a CPU, memory, and wireless communication device. They are possibly not connected to a power line, so they must survive by using a small battery or energy generated by energy harvesting. Therefore, low-power operation is requisite. In this short course, several memory devices which enable low-power operation will be introduced, mainly focusing on non-volatile memory devices. Ultra low-power SRAM achieved using an FD-SOI CMOS named SOTB will be also addressed as a promising low-power embedded cache memory.

Bio: Born in Miyagi Prefecture in 1955. Graduated with Master's Degree in Engineering from Tohoku University in 1980 and Doctorate in Engineering from The University of Tokyo in 1989. Joined Hitachi Ltd.'s Central Research Laboratory in 1980; now Senior Chief Researcher of Research & Development Group. Vice project leader of the Low-power Electronics Association & Project (LEAP) in Tsukuba from 2010 to 2014. IEEE Fellow and the Japan Society of Applied Physics Fellow. Main research field is semiconductor processes and devices.

The Challenges and Opportunities of RFIC Design in Nanoscale CMOS Technology: Architecture and Modeling to Optimize 5G and IoT Applications, H. -J. Lee, Intel Corporation
Abstract: Over the past 40 years, the vigorous scaling of Moore's law has driven exponentially faster, denser, and cheaper digital circuit designs while RFIC designs have struggled to attain a similar pace. This course covers breakthroughs in advanced nanoscale CMOS technologies – including FinFET technology – that can enable better scaling in RFIC design and integration. Two major challenges of RFIC design in advanced CMOS technology are the scaling of passive components and the spatial integration of RFIC components under tight coupling constraints. To overcome these challenges, this course presents some architectural solutions for advanced CMOS technology, including a digitally enhanced transmitter, an inductor-less transceiver, and a digital phase-locked loop that target upcoming 5G and IoT applications. The evolution of device modeling in advanced CMOS technologies complements these architectural solutions; the course introduces improvements in FinFET modeling that facilitate scaling of future RFIC design efforts.

Bio: Hyung-Jin Lee received the B.S. degree in Electrical Engineering from Hanyang University in Seoul, Korea in 2000, and the M.S. and Ph.D. degrees in Electrical Engineering from Virginia Tech in 2003 and 2006 respectively. He joined Intel in 2006, where he worked on PLL design for wireless and wireline communication systems. He presently leads Wireless Circuit Technology group in Logic Technology Division at Intel, where he develops critical RF device templates and designs RF/Mixed-signal circuits with advanced CMOS process technology.

12:45 pm | More-than-Moore (Ⅰ) : Sensors

MEMS and Sensors: Application & Key Aspects, R. Beica, Yole Développement
Abstract: The application scope of MEMS and sensors is broad and very diversified, from consumer, mobile and gaming to automotive, defense, medical, aeronautics and other industrial applications. While there are numerous developments happening for high reliability, especially for automotive, defense and aeronautics applications, low cost sensing packages for consumer application are expected to significantly grow.
As the mobile industry is turning into a complex sensing platform, this unprecedented demand for MEMS and sensors are not only impacting the shipment volumes but also how sensing modules are being designed, produced and packaged. Since its early beginnings, the MEMS industry faced the issues of being a highly fragmented market, with no manufacturing standards clearly emerging. Packaging always needed to cope with the very specific end-applications requirements of MEMS modules, however, the MEMS law "One MEMS = 1 Device with 1 Process with 1 Package" is now changing as several packaging platform standards are now clearly emerging (such as WLP & TSV Interconnects, SiP module assembly based on molded or cavity packaging). Combo sensors are also increasingly adopted, due to increased performance and functionality in smaller and lower cost packages.
The presentation will review the different MEMS and sensors applications, highlighting the importance of packaging and standardization as well as the impact of internet, mobility and connectivity. The presentation will describe the adoption of sensing devices and their evolution and development for Internet of Things. Requirements, value chain structure, technology and market trends as well as current and future expected challenges will be described.

Bio: Rozalia G. Beica is Chief Technology Officer at Yole Developpement, where she leads the advanced packaging and semiconductor manufacturing activities.
Rozalia is an international award winning scientist (2006 R&D 100), with over 60 publications (including 3 book chapters focused on 3D IC technologies) and four patents. For more than 16 years, she was involved in the research, application and strategic marketing of Advanced Packaging and 3D Interconnect, with global leading responsibilities at specialty materials (Rohm and Haas Electronic Materials), equipment (Semitool, Applied Materials, Lam Research) and device manufacturing (Maxim IC) organizations.
Throughout her career, Rozalia has been actively supporting various industry activities: Program Director of EMC3D Consortia (2008-2011), chair of the 3D activities within Assembly & Packaging TWG at ITRS (2011) and across all ECTC committees (2012), general chair at 2014 Global Semiconductors and Electronics Forum and several additional memberships with SRC IPC, CPMT, IWLPC and EMPC. Currently, she is co-chairing the Advanced Packaging committee within ECTC and supporting the IMAPS Device Packaging Conference as a general chair elect. Rozalia has a Global Executive MBA from Instituto de Empresa Business School (Spain), M. Sc. In Management of Technology from KW University (USA) and a M.Sc in Chemical Engineering from Polytechnic University "Traian Vuia" (Romania).

Essence of MEMS for VLSI Players, S. Tanaka, Tohoku University
Abstract: MEMS are based on semiconductor fabrication technology, but have a lot of difference from VLSI. It is sometimes misunderstood that MEMS is easier than VLSI, just judging from the generation of photolithography used, i.e. the minimum size of device structures. A phrase which well describes difficulty in MEMS is "One device, One process, One package". Different MEMS are often made via different fabrication processes and packaging technologies, which makes MEMS difficult to develop from technical and economical points of view. Recently, "sensor network", "wearable sensors" and "internet of things (IoT)" are key words for upcoming electronics innovation. The number of sensors in the world market is almost 10 billions per year at present, but may augment one or two order(s) of magnitude larger in a decade. It is natural to expect that MEMS technology will play the most important role to produce such a huge amount of sensors. Therefore, to know what make MEMS should be useful for VLSI players. In this short course, industry-relevant MEMS technologies are explained in a condensed manner.

Bio: Shuji Tanaka received B.E., M.E. and Dr.E. degrees in mechanical engineering from The University of Tokyo in 1994, 1996 and 1999, respectively. He was Research Associate at Department of Mechatronics and Precision Engineering, Tohoku University from 1999 to 2001, Assistant Professor from 2001 to 2003, and Associate Professor at Department of Nanomechanics from 2003 to 2013. He is currently Professor at Department of Bioengineering and Robotics, and Director of Micro/Nano-Machining Research & Education Center. He was also Fellow of Center for Research and Development Strategy, Japan Science and Technology Agency from 2004 to 2006, and is currently Selected Fellow. He authored 350 journal and international conference papers and delivered 100 invited talks. He was honored with The Young Scientists' Prize, The Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology (2009), German Innovation Award, Gottfried Wagener Prize (2012) and other 8 prizes. His research interests include heterogeneous integration, MEMS packaging, acoustic wave devices and piezoelectric devices and materials.

Semiconductor-Based Biosensing Technology for Clinical Diagnosis, T. Sakata, The University of Tokyo
Abstract: A principle of semiconductor device based on field effect can be utilized as a novel biosensing method, which allows to detect ionic charges for biological phenomena in a direct, label-free, real-time and noninvasive manner, because most bio-molecules have intrinsic molecular charges such as DNA molecules, and cell-cell communication is closely related to ionic behaviors through ion channel proteins at cell membrane. In this talk, I would like to introduce the possibility of semiconductor-based biosensing device in the field of clinical diagnosis, medicine and so on.

Bio: Toshiya Sakata is the Associate Professor of Department of Materials Engineering, Graduate School of Engineering at the University of Tokyo in Japan. Having obtained his degree of Ph.D. from Osaka University, he spent his career working for National Institute for Materials Science in Japan before taking up his present position at the University of Tokyo. Dr. Sakata has authored over 40 scientific publications and has received several scientific awards, including the 6th Yamazaki-Teiichi Prize Winner by Foundation for Promotion of Material Science and Technology of Japan.

15:00 pm | More-than-Moore (Ⅱ) : Energy Transfer & Energy Harvesters

Fundamental Challenges and Solutions for Energy Harvesting: A Bird's-Eye View on IoT Applications & Systems, M. Alioto, National University of Singapore
Abstract: This short course provides a fresh overview of the real challenges and the practical constraints that are imposed on the energy harvesting sub-system by IoT applications, in which energy is certainly the scarcest available resource. Real-world design targets and principles to meet them are discussed for different energy sources and classes of IoT applications. Emphasis is placed on the tradeoff between the availability of energy at "zero" cost and the actual hardware/energy cost to harvest it. Several academic and industrial designs are presented to gain an insight into several fundamental concepts that need to be leveraged in the IoT space, including adaptation, application specificity, and multi-source harvesting, among others.

Bio: Massimo Alioto received the Laurea and the Ph.D. degree in Electrical Engineering from the University of Catania (Italy) in 1997 and 2001. He is currently an Associate Professor at the Electrical and Computer Engineering Department of the National University of Singapore, where he leads the Green IC group and the Integrated Circuits and Embedded Systems area (80+ people). He previously held various positions, including Associate Professor at University of Siena, Visiting Scientist at Intel Labs – CRL (2013), Visiting Professor at University of Michigan - Ann Arbor (2011-2012), BWRC – University of California, Berkeley (2009-2011), and EPFL (2007).
He co-authored 200+ journal/conference publications and two Springer books. His research interests include ultra-low voltage VLSI circuits, green computing and systems, integrated circuits and systems for IoT, widely energy-scalable VLSI circuits, emerging technologies.
He was IEEE Distinguished Lecturer (2010-2012) and Chair of the "VLSI Systems and Applications" IEEE Technical Committee (2011-2012). He is currently Associate Editor in Chief of IEEE Transactions on VLSI Systems, and has served as Guest Editor of various journal special issues. He serves as Associate Editor of several ACM and IEEE journals. He was Technical Program Chair (e.g., ICECS, NEWCAS) and Track Chair (e.g., ICCD, VLSI-SoC, ISCAS) in a number of conferences.

Wireless Energy Transfer for IoT Era, H. Ishikuro, Keio University
Abstract: Wireless energy transfer technologies have brought great convenience to people's life in various kind of applications such as non-contact IC card and battery charging. Wearable devices, medical implantable devices, and wireless sensor nodes are the next promising applications in the era of IoT which demand for wireless energy transfer. Size and cost ruction is strongly required in IoT applications. This talk will provide an overview of wireless energy transfer techniques which use inductive coupling, capacitive coupling, and microwave. Recent approaches of integration of wireless energy transfer system into a chip will also be discussed in this talk.

Bio: Hiroki Ishikuro received the B.S., M.S. and Ph.D. degrees in electrical engineering from the University of Tokyo, Tokyo, Japan, in 1994, 1996, and 1999, respectively. In 1999, he joined the System LSI Research and Development Center, Toshiba Corp., Kawasaki, Japan, where he was involved in the development of CMOS RF and mixed-signal circuits for wireless interface LSI. In 2006, he joined the Department of Electronics and Electrical Engineering of Keio University as an assistant professor and started a research on high-speed inductive-coupling links for 3-D chip integration and non-contact connector. He is currently a professor of Keio University, and focuses on the mixed-signal circuit and system designs for energy efficient interfaces including wireless power transfer. He is a member of the Technical Program Committee for Symposium on VLSI Circuits.

Energy Harvesting for IoT, T. Skotnicki, STMicroelectronics
Abstract: Internet of Things involves a huge number of communicating devices deployed in our environment as well as in surrounding us objects. Related to Iot terms such as: Smart Planet, WSN (wireless sensor nets), Swarm, TSensors (trillion sensors), Internet of Everything, M2M (machine to machine), Smart Dust, etc. give an idea of the global and ubiquitous dimension of IoT. The economical aspect of IoT is also hard to be overestimated since none of the former High Tech revolutions has reached the volume of trillion unit market. This new enormous dimension of the market sets many new technical challenges, and among them the question of powering the IoT devices. The usage of batteries for this purpose could seem the simplest and the most natural, if not the fact that IoT devices will be often placed in inaccessible loci (in the volume or elements of constructions, buildings, machines, cars, industrial installations, urban infrastructure, rural vast areas, etc.). Changing trillions of batteries periodically may thus turn out to be more difficult and costly than their fabrication and deployment. Therefore, energy self-sustainability or self-powering of IoT devices is considered their key feature. In this SC chapter we will deliberate on main kinds of energy harvesters (PV, TEGs, vibrational, EM and RF). We will explain their operation principles, pros and cons, their state of the art, and their development perspectives and challenges.

Bio: Thomas SKOTNICKI is the STMicroelectronics Company Fellow and Technical Vice-President in charge of Disruptive Technologies at STMicroelectronics Crolles, France. In 2007, he received the title of Professor from the President of Poland, and recently has been appointed as the Director of CEZAMAT (Research Consortium) in Warsaw, Poland. The focus of his program at STMicroelectronics is on Low Power / Low Variability for 14nm and beyond CMOS, on innovative device structures, new memory concepts and cells, and on integration of new materials for CMOS. From 2010 he has extended the scope of his program to include Energy Harvesting for autonomous Low Power systems and devices. He holds about 80 patents on new devices, circuits and technologies. He has presented over 50 Invited Papers and Short Course Lectures, (co-) authored about 350 scientific papers (review based), and several book chapters in the field of CMOS and Energy Harvesting. From 2001 to 2007, he served as Editor for IEEE Transactions On Electron Devices. He has been teaching at EPFL (Lausanne, Switzerland) and SUPELEC (Rennes, France), and has supervised and led to successful defence 26 PhD theses. He has been serving in numerous Conference Program and Executive Committees (IEDM, VLSI, ESSDERC, ECS, SNW, IWJT), Academia Advisory Boards, Governmental Expert Commissions, R&D Program Steering Committees, ITRS, and Award Committees. He is an IEEE Fellow and SEE Senior Member.

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