2005 VLSI Technology Short Course Program
"Technologies for 45nm/32nm Nodes"
Monday, June 13, 2005 (Shunju)
Organizers: |
Tohru Mogami, NEC
Robert Chau, Intel
Carlos H. Diaz, TSMC
|
8:55 |
Introduction
|
| 9:00 |
Transistor Options for 45nm/32nm and Beyond
H.S. Philip Wong, Stanford University |
| 10:00 |
Break |
| 10:15 |
The Future of Planar CMOSFETs
Yuh-Jier Mii, TSMC |
| 11:15 |
Interconnect Scaling and BEOL Process Technology
Yoshihiro Hayashi, NEC |
| 12:15 |
Lunch |
| 13:45 |
New Design and OPC Flow for Manufacturability for
45nm Node and Beyond
Toshiya Kotani, Toshiba |
| 14:45 |
Break
|
| 15:00 |
Issues and Breakthrough Designs of 45nm/32nm SRAMs
Takayuki Kawahara, Hitachi |
| 16:00 |
What Is the Next Generation NVM: Extending Flash or
a Disruptive Alternative?
Al Fazio, Intel |
| 17:00 |
Conclusion |
|
