2006 VLSI Technology Short Course Program
Process Technologies for
Continued Scaling and Performance
Monday, June 12, 2006
Organizers: |
Robert Chau, Intel Corporation
Toshihiro Sugii, Fujitsu Laboratories, Ltd.
|
9:00 a.m. |
Back-End Interconnect Technology
|
| 10:00 a.m. |
Break
|
| 10:15 a.m. |
Advanced Embedded Memories
K. Ishimaru, Toshiba Corp. |
| 11:15 a.m. |
Lithography Solutions for 32nm and Beyond
M. Kameyama, Nikon Corp. |
| 12:15 p.m. |
Lunch |
| 2:00 p.m. |
Ultra-Shallow Junction Technologies
M. Kase, Fujitsu, Ltd. |
| 3:00 p.m. |
Device Technology
S. Thompson, University of Florida |
| 4:00 p.m. |
Break |
| 4:15 p.m. |
High-k Gate Dielectrics
J. Lee, University of Texas at Austin |
| 5:15 p.m. |
Conclusion
|
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