CMOS Logic - Technology Challenges for the Transition from 32nm to 22nm Monday, June 16, 2008 Organizers: Klaus Schruefer, Infineon Satoshi Inaba, Toshiba Corp. Digh Hisamoto, Hitachi, Ltd. 8:10 a.m. Introduction Klaus Schruefer, Infineon Technologies 8:15 a.m. Lithography Solutions M. Colburn, IBM Corp. 9:25 a.m. FEOL Scaling, New Device Architectures and Materials J. Kavalieros, Intel Corp. 10:35 a.m. Break 10:50 a.m. Interconnect Scaling, Processes and Integration H.-J. Barth, Infineon Technologies 12:00 p.m. Lunch 1:30 p.m. System on Chip - Key Aspects for MS/RF Integration M. Huang, Freescale 2:40 p.m. Break 2:55 p.m. Embedded Memory: SRAM Y. Kim, Samsung Electronics 4:05 p.m. Variability and DFM H. Yoshimura, Toshiba Corp. 5:15 p.m. Conclusion