2017 Symposia on VLSI Technology and Circuits

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Technology Plenary Session

Tuesday morning, June 6, 2017

“5G and it's surrounding situations until 2020 Takashi Tsutsui , SVP & Chief Scientist, SoftBank Corp., Japan

1979-1985, Doctor of Medicine, Kyoto Univ.
1987-1991, Kyoto University Hospital Graduate School of Internal Medicine
1995-1999, Lecturer of Computer Science, Teikyo Univ.
2000-2015, CTO, Technical Strategy Center, SoftBank BB
2005-Present, Chief Scientist, SoftBank Mobile
Now, Senior Vice President, SoftBank Mobile

Everybody getting excited with the 5G, mixing cats and dogs together. But the reality is, there is physical limitations and no magic, we should be cool. Whereas a lot would get to be possible and that should not be under estimated, and we should know what would be possible and what would not. Industry experts should be able to figure out better images before it actually comes, so as not to make big mistakes. Looking around 5G and it’s surrounding technologies, in view of capabilities and physical limitations, I would like to briefly survey situations around forthcoming these years. So far with my experience, I believe I can figure out a little bit better images, and can help a little.

“Internet of Thing (IoT) Technology with Special Focus on Security and Privacy” (TBD)
Fari Assaderaghi, CTO & SVP, NXP Semiconductors

Fari Assaderaghi is the Chief Technology Officer (CTO) and Senior Vice President of security and connectivity at NXP Semiconductors, a provider of mixed signal and standard product solutions. He will be discussing key requirements for sustained growth of Internet of Things
(IoT) technology with special focus on security and privacy.

Circuits Plenary Session

Tuesday morning, June 6, 2017

“Innovative Solutions Towards the Society Which AI, Robotics, IoT Lead Us to, and Expectation for VLSI”
Takeshi Yukitake, CTO, Connected Solutions Company, Panasonic Corporation

1984 Joined Matsushita Electric Industrial Co., Ltd. (Panasonic Corporation)
2010 Director, Technology Development Center,　Panasonic Mobile Communications Co.,Ltd.
2013 President, Panasonic System Networks R&D Lab. Co.,Ltd.
2015 Assistant Director, Innovation Center, AVC Networks Company, Panasonic Corp.
2017 CTO, Connected Solutions Company, Panasonic Corp.

AI, Robotics, and IoT have attracted enormous attention, expected to greatly change our society in the future. With these innovative technologies, our society would become (1) a borderless communication society, (2) a symbiotic society with robots, and (3) a safe, secure and comfortable network society. This plenary talk will show our specific initiatives, aiming at society heading for the futures, namely, (1) automatic translation, (2) underwater robot, and (3) large scale monitoring system. All of them work in collaboration with cloud, and will evolve into an advanced system. At the same time, higher performance and more intelligent processing is required on the edge side, thus we expect VLSI to play even more important roles.

“Inside Waymo's Self-Driving Car: My Favorite Transistors” Daniel Rosenband, Waymo

Daniel Rosenband leads the Compute Team at Waymo (formerly Google's self-driving car project). Prior to joining Google's self-driving car team in 2013, Daniel worked at several start-ups, most notably at Sandburst, a networking chips company he co-founded and which was successfully acquired by Broadcom. He also served as an architect at Metaram designing innovativPe memory and storage technologies. Daniel received his doctorate in Computer Science from MIT where he also graduated with Bachelor's and Master's degrees.

Waymo's self-driving car contain a broad set of technologies that enable our cars to sense the vehicle surroundings, perceive and understand what is happening in the vehicle vicinity, and determine the safe and efficient actions that the vehicle should take. Many of these technologies are rooted in advanced semiconductor technologies, e.g. faster transistors that enable more compute or low noise designs that enable the faintest sensor signals to be perceived. This paper summarizes a few areas where semiconductor technologies have proven to be fundamentally enabling to self-driving capabilities. The paper also lays out some of the challenges facing advanced semiconductors in the automotive context, as well as some of the opportunities for future innovation.

Demo Session

Monday evening, June 5, 2017

Newly Established Venue for in-depth Discussion with Authors:

- Demonstration of chip operation highlighting key results
- Systems showcasing potential applications for circuit-level innovations
- Table-top real-time demonstration of new device characterization
- Visual illustration of technological concepts and analyses

Joint Evening Panel Discussion

Tuesday evening, June 6, 2017, 20:00 - 21:30

How Will We Survive the Post-Scaling Era?

Organizers:
Takaaki Tsunomura,Tokyo Electron Ltd. / Carlos Mazure, Soitec Group / Srikanth Nimmagadda, Intel Corp.

Moderator:
Ted Letavic, GLOBALFOUNDRIES

Panelists:
Ron Moore, ARM
Jeff Burns, IBM
Frederic Boeuf, STMicroelectronics / Univ. of Tokyo
Yongjoo Jeon, Samsung
Julien Ryckaert, imec

For many decades the semiconductor industry has enjoyed the benefits of scaling. Every 2 years or so a new process node would arrive, bringing with it reduced area, along with improved performance and power. In recent years, we have seen and overcome many challenges to the scaling model, necessitating considerable efforts in VLSI circuits and technology. While we have largely maintained area scaling, obtaining even modest node-to-node improvements in performance and power has been difficult.
New applications require much higher level compute than ever before which we are aiming to do via accelerators, programmable fabrics etc. These implementations respond very well with technology scaling.
However, we are now approaching the biggest challenge yet. What happens when scaling slows to the point that it has, for practical purposes, stopped? How will we survive the post-scaling era? Our panel of experts, spanning VLSI technology, circuits, and business, looks at the difficulties ahead and potential ways forward.

Technology Evening Panel Discussion

Tuesday evening, June 6, 2017, 20:00 - 21:30

Transistor Future; How Does It Evolve after FinFET Era?

Organizers:
Takaaki Tsunomura, Tokyo Electron Ltd. / Carlos Mazure, Soitec Group

Moderator:
Jason Woo, UCLA

Panelists:
David McCann, GLOBALFOUNDRIES
Chidi Chidambaram, Qualcomm
Dan Mocuta, imec
Huiming Bu, IBM
Ionut Radu, SOITEC

The FINFET has become widely used for nodes below 16nm. Its introduction in the manufacturing world has extended scalability of transistor dimensions. Beyond 5nm it is uncertain if the benefits of a FINFET structure will be maintained or lost.
Alternative MOSFET structures may emerge to secure scaling. Nanosheet or nanowire have the potential to suppress short channel effect but these devices have an issue in enhancing on-state current without stacking multiple nanosheets or nanowires. Another approach is scaling channel thickness toward atomic scale. 2D materials like transition metal di-chalcogenide, black phosphorus are extensively studied. Synthesized 2D materials with single crystal structure has not been realized, and electrical characteristic are still poor compared with latest Si channel FET.
Although electrical characteristicsare improved with alternative transistor structures, size scaling will approach physical limitation. Adopting 3D structures is one of ways to maintain “equivalent size scaling”. NAND flash already uses this approach by transferring from 2D NAND to 3D NAND. Does this strategy work well in case of logic devices? There are many issues in 3D logic.
Overlay between different layers, choice of FET structure (lateral, vertical), Joule heating during operation, and cost / area merit.
In this panel discussion, future roadmap of FET will be discussed by 1D, 2D, and 3D FET experts.

Circuits Evening Panel Discussion

Tuesday evening, June 6, 2017, 20:00 - 21:30

The Most Important Circuits of 2037

Organizers:
Hiroki Ishikuro, Keio University / Bryan K. Casper, Intel Corporation

Moderator:
Kofi Makinwa, Delft Univ.

Panelists:
James Myers, ARM
Pieter Harpe, Eindhoven University of Technology
Hirotaka Tamura, Fujitsu
Chintan Thakkar, Intel Corp.
Jerald Yoo, National University of Singapore
Koichi Nose, Renesas
Kevin Zhang, TSMC

This year, the Symposium on VLSI Circuits celebrates its 30th anniversary. Many innovative circuit design techniques have been presented over the history of symposium, but what does the future hold? What kinds of VLSI circuits will be presented, and for what kind of applications, at the 2037 Symposium on VLSI Circuits? In short, what will be the most important circuits of 2037? In response to this question, the panelists, who are a mix of young and senior specialists from across the circuits spectrum, give us their version of the future 20 years from now, with an entertaining mix of fantasy, science fiction and humor in their contributed VLSI circuits.

Luncheon

Thursday, June 8, 2017, 12:40-14:00

Approach to Develop Prosthetic Technology as a Part of Body

Organizers:
Makoto Ikeda, The Univ. of Tokyo / Meishoku Masahara, AIST

Speaker:
Ken Endo, CEO, Xiborg

Once a part of human body is disabled physically or functionally, he would lose a huge amount of his quality of life, and the current available technology is not functional enough to compensate lost function in comprehensive way. On the other hand, several fields such as paralympic long jump show possibility of technology which could exceed human normal function. We are currently focusing on developing prosthetic technology to optimize sprint gait which is eventually useful to develop device supporting human life.

Biography:
Ken Endo is an associate researcher at Sony Computer Science Laboratories Inc., and CEO of Xiborg Co., Ltd. Endo received his PhD as a member of the Media Lab's Biomechatronics group. At Sony CSL, he works on technology that rehabilitates and augments human physical capability, such as prostheses and orthoses. His team is now developing an athletic prosthesis with a goal of a gold medal in the 100m sprint at the Tokyo Paralympic games in 2020. He has been named to MIT Technology Review's list of top innovators under 35 (TR35). He has also been chosen as a Young Global Leader 2014 by the World Economic Forum.