2019 Symposia on
VLSI Technology and Circuits

Best Student Paper Award

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Requirements for 2019 Symposia on VLSI Technology and Circuits Best Student Paper Award

Both the Symposium on VLSI Technology and the Symposium on VLSI Circuits recognize outstanding student papers with a Best Student Paper Award. The awards were established in 2004 to promote student research and support the development of future leaders in the fields of VLSI Technology and VLSI Circuits. Award recipients are selected based on the quality of their written papers and the quality of their presentations at the Symposia. Award recipients receive a monetary prize and certificate, presented at the opening session of the Symposium held in the following year. Award recipients’ travel expenses and registration fees for the Symposium held in the following year are covered by the Symposia. Candidates for the awards must be enrolled as full-time students at the time of paper submission, must be the leading author and the presenter of their papers, and must indicate at submission that their papers should be considered for the award.

VLSI BSPA Verification Form

As a candidate for VLSI BSPA, student author needs to fill out “Verification Form for VLSI Student Paper” including Professor/Industrial supervisor sign.
Then it is needed to be scanned and uploaded to Online Submission System upon your paper submission.

Former Best Student Paper Award Winners

Past Technology Paper Winners

2017

Recipient: Dian Lei

Paper:The First GeSn FinFET on a Novel GeSnOI Substrate Achieving Lowest S of 79 mV/decade and Record High Gm,int of 807 μS/μm for GeSn P-FETs

Authors: Dian Lei1, Kwang Hong Lee2, Shuyu Bao2,3, Wei Wang1, Saeid Masudy-Panah1, Sachin Yadav1, Annie Kumar1, Yuan Dong1, Yuye Kang1, Shengqiang Xu1, Ying Wu1, Yi-Chiau Huang4, Hua Chung4, Schubert S. Chu4, Satheesh Kuppurao4, Chuan Seng Tan2,3, Xiao Gong1 and Yee-Chia Yeo1

Affiliation: 1National University of Singapore, 2Singapore MIT Alliance for Research and Technology, 3Nanyang Technological University, 4Applied Materials

2016

Recipient: Lukas Czornomaz

Paper:First Demonstration of InGaAs/SiGe CMOS Inverters and Dense SRAM Arrays on Si Using Selective Epitaxy and Standard FEOL Processes

Authors: L. Czornomaz, V. Djara, V. Deshpande, E. O’Connor, M. Sousa, D. Caimi, K. Cheng*, J. Fompeyrine

Affiliation: IBM Research GmbH Zürich Laboratory, *IBM Research

2015

Recipient: Cimang Lu

Paper:Design and Demonstration of Reliability-Aware Ge Gate Stacks with 0.5 nm EOT

Authors: Cimang Lu, Choong Hyun Lee, Tomonori Nishimura and Akira Toriumi

Affiliation:The University of Tokyo, JST-CREST

2014

Recipient: Heng Wu

Paper: Ge CMOS: Breakthroughs of nFETs ( Imax= 714 mA/mm, gmax= 590 mS/mm) by Recessed Channel and S/D

Authors: Heng Wu, Mengwei Si, Lin Dong, Jingyun Zhang, Peide Ye

Affiliation: Purdue University

2013

Recipient: ChoongHyun Lee

Paper: Enhancement of High-Ns Electron Mobility in Sub-nm EOT Ge n-MOSFETs

Authors: ChoongHyun Lee, Cimang Lu, Toshiyuki Tabata, Tomonori Nishimura, Kosuke Nagashio, and Akira Toriumi

Affiliation: The University of Tokyo

2012

Recipient: Rui Zhang

Paper: High Mobility Ge pMOSFETs with 0.7 nm Ultrathin EOT using HfO2/Al2O3/GeOx/Ge Gate Stacks Fabricated by Plasma Post Oxidation

Authors: Rui Zhang, Po-Chin Huang, Noriyuki Taoka, Mitsuru Takenaka and Shinichi Takagi

Affiliation: The University of Tokyo

2011

Recipient: Jiale Liang

Paper: A 1.4μA Reset Current Phase Change Memory Cell with Integrated Carbon Nanotube Electrodes for Cross-Point Memory Application

Authors: Jiale Liang, Rakesh Gnana David Jeyasingh, Hong-Yu Chen, and H. -S. Philip Wong

Affiliation: Stanford University

2010

Recipient: Laurent Brunet

Paper: New Insight on VT stability of HK/MG stacks with scaling in 30nm FDSOI technology

Authors: Laurent. Brunet*+, X. Garros, M. Cassé, O. Weber, F. Andrieu, C. Fenouillet-Béranger, P. Perreau, F. Martin, M. Charbonnier, D. Lafond, C. Gaumer*, S. Lhostis*, V. Vidal, L. Brévard, L. Tosti, S. Denorme*, S. Barnola, J.F. Damlencourt, V. Loup, G. Reimbold, F. Boulanger, O. Faynot, A. Bravaix

Affiliation: 1CEA-LETI, * STMicroelectronics, +IM2NP

2009

Recipient: Gregory Bidal

Paper: High velocity Si-nanodot: a candidate for SRAM applications at 16nm node and below

Authors: Gregory Bidal1,2, Frederic Boeuf1, Stephane Denorme1, Nicolas Loubet1, Jean Luc Huguenin1,2, Pierre Perreau3, Dominique Fleury1,2, François Leverd1, Sebastien Lagrasta1, Sebastien Barnola3, Thierry Salvetat3, Bastien Orlando1, Remi Beneyton1, Laurent Clement1, Roland Pantel1, Stephane Monfray1, Gerard Ghibaudo2 and Thomas Skotnicki1

Affiliation: 1STMicroelectronics, 2IMEP, Minatec INPG, 3CEA-LETI/Minatec

2008

Recipient: Nishant Patil and Albert Lin

Paper: Integrated Wafer-Scale Growth and Transfer of Directional Carbon Nanotubes and Misaligned-Carbon-Nanotube-Immune Logic Structures


Authors: Nishant Patil, Albert Lin, Edward R. Myers, H.-S. Philip Wong, and Subhasish Mitra

Affiliation: Stanford University


2007

Recipient: Mohan V. Dunga

Paper: BSIM-MG: A Versatile Multi-Gate FET Model for Mixed-Signal Design

Authors: Mohan V. Dunga1, Chung-Hsun Lin1, Darsen D. Lu1, Weize Xiong2, C. R. Cleavelin2, P. Patruno3, Jiunn-Ren Hwang4, Fu-Liang Yang4, Ali M. Niknejad1 and Chenming Hu1

Affiliation: 1University of California, Berkeley, 2Texas Instruments Inc., 3SOITECH, 4Taiwan Semiconductor Manufacturing Company (TSMC)

2006

Recipient: Hyunjin Lee

Paper: Sub-5nm All-Around Gate FinFET for Ultimate Scaling

Authors: Hyunjin Lee, Lee-Eun Yu, Seong-Wan Ryu, Jin-Woo Han, Kanghoon Jeon, Dong-Yoon Jang, Kuk-Hwan Kim, Jiye Lee, Ju-Hyun Kim, Sang Cheol Jeon*, Gi Seong Lee*, Jae Sub Oh*, Yun Chang Park*, Woo Ho Bae*, Hee Mok Lee*, Jun Mo Yang*, Jung Jae Yoo*, Sang Ik Kim* and Yang-Kyu Choi

Affiliation: Korea Advanced Institute of Science and Technology, *Korean National Nanofab Center

2005

Recipient: Chien-Tai Chan

Paper: Investigation of Post-NBTI Stress Recovery in pMOSFETs by Direct Measurement of Single Oxide Charge De-Trapping

Authors: Chien-Tai Chan, Huan-Chi Ma, Chun-Jung Tang and Tahui Wang

Affiliation: National Chiao-Tung University

2004

Recipient: Sunjung Kim

Paper: Engineering of Voltage Nonlinearity in High-K MIM Capacitor for Analog/Mixed-Signal ICs

Authors: Sunjung Kim1, Byung Jin Cho1, Ming-Fu li1,2, Shi-Jin Ding1, Ming Bin Yu2, Chunxiang Zhu1, Albert Chin3, and Dim-Lee Kwong4

Affiliation: 1National University of Singapore, 2Institute of Microelectronics (IME), Singapore, 3National Chiao Tung University, 4University of Texas, Austin

VLSI Technology Technical Program Committee

Chair Shinya Yamakawa
Co-Chair Tomas Palacios