Sunday Workshop 3
Workshop on Low Thermal Budget Dopant Activation for Sequential-3D Integration
Organizer:
Rino Choi (Inha Univ., Korea),
Jia-Min Shieh (TSRI-Narlabs, Taiwan),
Perrine Batude (CEA-Leti, France)
Abstract / objectives:
The workshop is aiming at sharing and gaining expertise on junction design considering the
thermal constraints associated to sequential 3D integration. It will gather researchers from
various fields including process, integration, simulation and theory. The WS will review all the
strategies used or potentially useful for low T junction design: laser and microwave annealing,
solid phase epitaxy regrowth, in situ doped epitaxy. We are aiming at creating momentum around
low T junctions which could also be fed back to mainstream technologies when it comes to
abruptness management.
| Tittle | Speaker Organization |
Time | |
|---|---|---|---|
| Session 1 | Advanced Annealing Processes for Fin/GAA FETs Fabrications | Yao-Jen Lee TSRI-Narlabs |
19:00 |
| Various junction formation techniques for monolithic 3D integration | Rino Choi Inha Univ. |
19:25 | |
| SPER optimized junction for high performance devices within 500°C thermal budget | Perrine Batude CEA-Leti |
19:50 | |
| 15 minutes Break | 20:15 | ||
| Session 2 | Low thermal budget pulsed Laser thermal annealing for 3D sequential integration | Karim Huet Screen LASSE |
20: 30 |
| Review on SPER process in Si and SiGe (damage formation, dopant activation and stability, impact on stress relaxation) | Fuccio Cristiano CNRS-LAAS |
20:55 | |
| Low Temperature Epitaxial films: Challenges and New Enabling Process Technologies | Manish Hemkar AMAT |
21:20 | |