SECOND ANNOUNCEMENT AND CALL FOR PAPERS Sponsored by the Japan Society of Applied Physics and the IEEE Solid-State Circuits Society In Cooperation with the Institute of Electronics, Information and Communication Engineers and the IEEE Electron Devices Society Rihga Royal Hotel Kyoto Kyoto, Japan June 16 - 18, 2005 The 2005 Symposium on VLSI Circuits will provide the designers of integrated circuits an opportunity to meet and present important new work at an international forum. The three day Symposium will continue the successful format and atmosphere established by the previous meetings, and partially overlap the 2005 Symposium on VLSI Technology, which is being held at the same hotel. The scope of the Symposium covers all aspects of VLSI circuits, such as: - digital, analog, and mixed digital-analog circuits: such as processors, ASICs, A/D and D/A converters, interface circuits, etc. - memory circuits: such as static memory, non-volatile memory, cache memory, dynamic memory, and new concepts in memories based on quantum mechanics effects, magnetism, polymers, etc. - system architecture, circuits and building blocks for networking applications - circuits, functional blocks using quantum dots, MEMS, sensors, etc. - fundamentals related to the above, including design automation tools, innovative circuits and device structures The emphasis will be on circuit design. Papers will be considered on the basis of originality and quality. Implementation in a semiconductor chip and measured results are not mandatory. They are required only when feasibility of the presented circuit is not clear by simulations alone, such as in the case for most analog submissions. It is understood that papers in new areas are likely to contain less quantitative evaluations than those in more established areas. SUBMISSION OF PAPERS Prospective authors must submit papers in the format of two or four pages of camera-ready copy to the web page: /20web/author.html Please note that a postal submission in hard copy will NOT be accepted. Those interested in submitting papers should access the above web. The papers are to be submitted in final form and, if accepted, will be published as submitted. The choice of paper length (either 2 or 4 pages) is an option for authors whenever two pages is not enough to completely describe the major novelty and results of their work. The paper length will not be a criterion in selection of the papers for the program. To improve the probability for acceptance of a submitted paper, the paper should describe original work with specific results from experiments or simulations. The content of the paper must not be announced or published prior to the Symposium. Submissions from universities are encouraged. Partial travel expense support for students who are presenting papers is available upon request. BEST STUDENT PAPER AWARD The Best Student Paper Award was established in 2004. The selection will be based upon the quality of the written paper and the presentation. The student that receives the Best Student Paper Award will receive a monetary award and a certificate. The student must be the leading author and presenter of the paper, and must indicate in the web submission form that this is a student paper in order to be considered for this award. Paper Submission Deadline is 17:00, January 7, 2005 (JST) INFORMATION AND REGISTRATION Prospective attendees can obtain further information and forms for Symposium registration and hotel reservations by contacting their respective secretariats. VLSI CIRCUITS SHORT COURSE A one-day short course will be held on June 15, 2005. Details will be given in the VLSI Circuits Symposium Advance Program, which will be issued toward the end of March, 2005. Preceding this Symposium, the 2005 Symposium on VLSI Technology will be held at the same location. See the reverse side. Secretariat for VLSI Symposia (Japan) c/o ICS Convention Design, Inc. Sumitomo Corp., Jinbocho Bldg. 3-24, Kanda-Nishikicho, Chiyoda-ku Tokyo 101-8449, Japan Tel: +81-3-3219-3541 Fax: +81-3-3292-1811 E-mail:vlsisymp@ics-inc.co.jp Secretariat for VLSI Symposia (USA) Widerkehr and Associates 16220 S. Frederick Ave. Suite 312 Gaithersburg, MD 20877, USA Tel: +1-301-527-0900 ext.103 Fax: +1-301-527-0994 E-mail:vlsi@vlsisymposium.org