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2001 Symposia on VLSI Technology and Circuits

Rihga Royal Hotel Kyoto, Kyoto, Japan  June 12-16

Author's Guide


PAPER PREPARATION KIT
The 2001 Symposium on VLSI Technology - June 12--14, 2001
The 2001 Symposium on VLSI Circuits - June 14--16, 2001

Dear Author(s):
Welcome to the 2001 Symposia on VLSI Technology & Circuits. We appreciate your interest in submitting a paper to the Symposium. Enclosed in this Paper Preparation Kit you will find all the necessary information and forms for the preparation of your submitted paper. The accepted papers will be printed in the Digest of Technical Papers as received, without opportunity for further changes.

For the Technology Symposium:
The 2001 Symposium on VLSI Technology, represents the Symposium in a New Century, welcomes submission of papers on all aspects of VLSI technology and includes a new feature. The scope of the symposium is
---new concepts and breakthroughs in VLSI devices and processes
---new functional devices including quantum effect devices with possible VLSI implementation
---materials innovation for MOSFET and interconnect in VLSI
---advanced lithography and fine patterning technologies for high density VLSI
---process/device modeling of VLSI devices
---packaging and reliability of VLSI devices
---theories and fundamentals related to the above devices
---new concepts and technologies for VLSI manufacturing

For the Circuits Symposium:
The 2001 Symposium on VLSI Circuits is the 1st Symposium in the new century and celebrates the 15th anniversary of the Symposium. The 2001 Symposium will provide those involved in the design of integrated circuits an opportunity to meet and present important new work at an international forum. The three day Symposium will continue the successful format and atmosphere established by the previous meetings, and partially overlap the 2001 Symposium on VLSI Technology, which is being held at the same hotel. The scope of the Symposium covers all aspects of VLSI circuits, such as:
---digital, analog, and mixed digital-analog circuits, such as processors, ASICs, A/D and D/A converters, interface circuits, etc.
---memory circuits such as volatile and non-volatile memories, cache memory, new concept memories based on quantum mechanics or magnetism, etc.
---system architecture, circuits and building blocks for networking applications
---circuits, functional blocks using quantum dots, magnetic/polymer memories, MEMS
---fundamentals related to the above subjects, including CAD tools innovative circuits and device structures
The emphasis will be on circuit design. Papers will be considered on the basis of originality and quality. Implementation in a semiconductor chip and measured results are not mandatory: they are required only when feasibility of the presented circuit is not clear by simulations alone, as in the case for most analog submissions. It is understood that papers in new areas are likely to contain less quantitative evaluations than those in more established areas. In order to insure that your paper receives a complete review, it is imperative that you follow all the instructions and submit all the required documentation. Enclosed to assist you are:

1. GENERAL GUIDELINES that address the deadlines and required documentation
2. AUTHOR'S GUIDE that provides a detailed description of camera-ready paper preparation. The paper must be in final form, and if accepted, will be published without any modifications.
3. SAMPLE PAGE as an illustration of a correctly prepared 75 word Abstract
4. COPYRIGHT TRANSFER FORM (Technology, Circuits) giving the conference permission to print the paper if accepted

The deadline for RECEIPT of camera-ready papers is January 10, 2001. Your cover letter, camera-ready paper (plus 52 double-sided copies), 75 word abstract (plus 5 copies), and copyright transfer form MUST ARRIVE at the Conference Office by that date. We are sorry but due to review deadlines, papers received after that date will not be accepted for review.
If accepted for presentation, the content of the paper must not be announced or published prior to the Symposia. You will receive instructions on producing an electronic file for the CD-Rom to be distributed at the Symposia. The Technical Program Committee will review all submitted papers and authors will receive notification of the Committee's decision around March 5, 2001.
We thank you for your interest in the Symposia on VLSI Technology & Circuits. If you have any further questions, please do not hesitate to contact the Conference Office at vlsisymp@bcasj.or.jp (Japan) or vlsi2001@aol.com (USA).

Symposium on VLSI Technology
Tadashi Nishimura - Program Chair
Tel: +81 727 84 7301
Fax: +81 727 80 2685
Yuan Taur - Program Co-Chair
Tel: +1 914 945 2847
Fax: +1 914 945 4245

Symposium on VLSI Circuits
Masakazu Yamashina - Program Chair
Tel: +81 42 771 0746
Fax: +81 42 771 0881
Shekhar Borkar - Program Co-Chair
Tel: +1 503 696 3912
Fax: +1 503 696 1442