General Infomation DATE AND LOCATION The 2001 Symposium on VLSI Technology and the 2001 Symposium on VLSI Circuits will be held on June 12-14 and June 14-16, 2001 respectively. The Technology Short Course will be held on June 11. The Circuits Short Course will be held on June 13. All the meetings will be held at Rihga Royal Hotel Kyoto, Horikawa-Shiokoji, Shimogyo-ku, Kyoto 600-8237, Japan. TECHNICAL PROGRAMS AND SOCIAL EVENTS Date Morning and Afternoon Evening June 11(Mon.)  VLSI Technology Short Cource  Reception   12(Tue.)  Symposium on VLSI Technology  Dinner   13(Wed.)  Symposium on VLSI Technology  Rump Session  VLSI Circuits Short Cource  Reception   14(Thur.)  Symposium on VLSI Technology    Symposium on VLSI Circuits  Rump Session   15(Fri.)  Symposium on VLSI Circuits  Dinner   16(Sat.)  Symposium on VLSI Circuits   To encourage open discussion of technical information, cameras, tape recorders etc. will not be allowed in any sessions. REGISTRATION DESK The technical digest and registration materials will be distributed at the registration desk situated on the second floor of the Rihga Royal Hotel Kyoto. The registration desk will be open as follows: Symposium on VLSI Technology Sunday, June 10 6:00 p.m.-8:00 p.m. Monday, June 11 8:00 a.m.-7:00 p.m. Tuesday, June 12 8:00 a.m.-5:00 p.m. Wednesday, June 13 8:00 a.m.-5:00 p.m. Thursday, June 14 8:00 a.m.-5:00 p.m. Symposium on VLSI Circuits Tuesday, June 12 8:00 a.m.-5:00 p.m. Wednesday, June 13 8:00 a.m.-5:00 p.m. Thursday, June 14 8:00 a.m.-5:00 p.m. Friday, June 15 8:00 a.m.-5:00 p.m. Saturday, June 16 8:00 a.m.-12:00 noon MESSAGE Please check the message board periodically. It will be located near the registration desk. Please advise those who wish to reach you during the day to phone the Rihga Royal Hotel Kyoto operator (+81-75-341-1121) and request the secretariat of VLSI Symposia (Room Horikawa). VISA REQUIREMENT All foreign participants must have a valid passport. We would like to advise all participants, who may be required to apply for a VISA, that the application process requires time. Please contact the nearest Japanese embassy as soon as possible. TRAVEL EXPENSE SUPPORT Requests for partial travel expense support for students who are presenting papers should be sent to Secretariat in Japan (see below for address) Sponsors Japan Society of Applied Physics IEEE Electron Devices Society Institute of Electronics, Information and Communication Engineers IEEE Solid-State Circuits Society Secretariat Japan USA c/o Business Center for Academic Societies Japan 5-16-9 Honkomagome, Bunkyo-ku Tokyo 113-8622, Japan (address in Japanese) Tel: +81 3 5814 5800 Fax: +81 3 5814 5823 E-mail: vlsisymp@bcasj.or.jp Widerkehr and Associates 101 Lakeforest Boulevard, Suite 400B Gaithersburg, MD 20877, USA Tel: +1 301 527 0900 ext.103 Fax: +1 301 527 0994 E-mail: vlsi2001@aol.com