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Sunday Workshop
Sunday Workshop
This year, for the first time, VLSI symposium is going to hold 3 Workshops on Sunday evening. Both research and application topics will be discussed, which have not been well covered in the technical program of the main symposium.
- Time: 7pm – 10pm, Sunday, June 9th (Evening before the short course)
- Place: RIHGA Royal Hotel in Kyoto (Same venue as main symposium)
- Topics:
- Workshop 1: Impact of Atomic Layer Processing and Selective Area Patterning on Device Fabrication and Performance
Organizer: Eric A. Joseph (IBM Research, USA) - Workshop 2: Two Dimensional Materials and Applications
Organizer: Iuliana Radu (imec, Belgium) - Workshop 3: Low Thermal Budget Dopant Activation for Sequential-3D Integration
Organizer: Rino. Choi (Inha Univ. Korea),
Jia-Min Shieh (Narlabs-NDL, Taiwan),
Perrine Batude (Leti, France)
- Workshop 1: Impact of Atomic Layer Processing and Selective Area Patterning on Device Fabrication and Performance
- Registration fee: FREE for the main symposium or the short course attendee
Several specialists are invited to each workshop. This will be a great opportunity for you to acquire new knowledge and to expand your networks. Please arrange your schedule to be in Kyoto on Sunday evening and enjoy this new event.
Satellite Workshops
2019 Silicon Nanoelectronics Workshop
The 2019 Silicon Nanoelectronics Workshop will be held on Sunday, June 9 & Monday, June 10, 2019 as a Satellite Workshop at the same location where Symposium takes place.
2019 Spintronics Workshop on LSI
The 2019 Spintronics Workshop focusing on VLSI-implementable Spintronics Technology will be held on Sunday, June 9, 2019 also at the same location.