Workshop 1 | Symposium on VLSI Technology and Circuits

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Open Source PDKs and EDAs, Community Experiences toward Democratization of Chip Design

Organizer : Makoto Ikeda (The University of Tokyo)å
Organizer : Mehdi Saligane (University of Michigan)

Since its launch in 2020, the Open MPW shuttle program has received over 500 project submissions spanning 9 shuttles. This workshop will explore various topics related to designers' experiences, including measured results, foundry perspectives, and governmental expectations.

About Makoto Ikeda

Makoto Ikeda received his BE, ME, and Ph.D. degrees all in EE department of the University of Tokyo in 1991, 1993, and 1996, respectively. He is now a full professor at d.lab, the University of Tokyo. This workshop is co-organized with Dr. Mehdi Saligane of University of Michigan.

1. Design experience: “The Journey of Two Novice LSI Enthusiasts: Tape-Out of CPU+RAM in Just One Month”, Kazuhide Uchiyama, University of Electro-Communications and Yuki Azuma, University of Tsukuba: Abstract:
Chisato Nishikigi is a member of the "CPU-dev" group, which is a technical community dedicated to hobby CPU design. Recently, he participated in MPW-3, where he successfully taped out his own 8-bit CPU. Although he had previous experience designing soft CPUs using FPGA, this was his first attempt at an actual silicon tape-out. He shared his experience of using open-source EDA tools on a newly launched Japanese website called vlsi.jp <http://vlsi.jp>. Additionally, he created the #japan-region channel in the open-source-silicon.dev <http://open-source-silicon.dev> community, where he hopes to share his knowledge and experience with other open-source silicon designers in Japan. His contributions will undoubtedly help grow the community and advance the field of open-source silicon design in Japan.

About Kazuhide Uchiyama

Kazuhide Uchiyama is a fourth-year undergraduate student at the University of Electro-Communications. He majors in information security and has a keen intellectual curiosity. Kazuhide started designing self-made CPUs on FPGA and has since been involved in building a community for self-made CPUs with his friend Yuki. They also create Japanese documentation for tools used in open-source silicon.

About Yuki Azuma

Yuki Azuma is a fourth-year student at the University of Tsukuba, Department of Physics. He enjoys building his own CPUs and operating systems to understand how they work. Yuki has a keen interest in understanding the underlying principles of how things operate.. A year and a half ago, he and his friend Kazuhide learned about the OpenMPW program. They tried their first attempt at digital LSI fabrication together.
2. From Zero to 1000 Open Source Custom Designs in Two Years, Mohamed Kassem, Co-founder and CTO, Efabless: Abstract:
Development of current EUV tools and future high NA tools: Overview of development that has enabled current 0.33 NA EUV lithography and work needed to enable the high NA EUV lithography to be successfully implemented.

About Anthony Yen

Anthony Yen is Vice President and Head of Technology Development Center at ASML. He received BSEE from Purdue University and SM, EE, PhD, and MBA from MIT. After receiving his doctorate, he worked at Texas Instruments and at IMEC on assignment from TI. From 1997 to 2017, apart from a three-year stint at Cymer (now part of ASML) leading its marketing organization, he was with TSMC where he first led the development of its lithography processes, and then co-led infrastructure development for next-generation-lithography technologies on assignment at SEMATECH; in his last ten years of career at TSMC, he led the development of EUV lithography, including its mask technology, for high-volume manufacturing. Yen is a Fellow of IEEE and SPIE. He is a recipient of the Frits Zernike Award for Microlithography from SPIE and the Outstanding Electrical and Computer Engineer Award from Purdue University. He serves as a Distinguished Lecturer for the IEEE Electron Devices Society.
3. The SKY130 Open Source PDK: Building an Open Source Innovation Ecosystem, Steve Kosier, Skywater technology: Abstract:
SkyWater Technology was the first foundry to join the OpenMPW shuttle program opening a new vista for open-source silicon design with 8 shuttles accumulating a total of more than 500 projects submission. Learning from SkyWater’s strategy and experience can be a source of inspiration for the entire semiconductor industry and help set the right expectations for other foundries looking into joining the program.

About Steve Kosier

Steven Kosier is responsible for the Advanced Technology Services (ATS) and Wafer Services (WS) operations within SkyWater, partnering with companies to co-create their innovative process flows from concept to mass production. He is also responsible for forming and managing strategic technology partnerships and alliances, developing the company’s technology roadmap and IP strategy, and growing the value of the company’s technology portfolio.
4. Open Source Chip Design on GF180MCU – A foundry perspective, Karthik Chandrasekaran, Global foundries: Abstract:
As part of the industry that’s changing the world, Globlfoundries has Open Sourced the 180MCU PDK to accelerate innovation and also train the next generation of talent. The talk will outline the status of the GF180MCU MPW program and what’s next for the Open Source Ecosystem from a foundry perspective.

About Karthik Chandrasekaran

Karthik Chandrasekaran (Global foundries Karthik Chandrasekaran has a PhD In Electrical engineering from Nanyang Technology University. He has over 17 years of industry experience at AMD and Global foundries. He has worked on a wide range of technologies (PDSOI, FDSOI, Bulk CMOS and FinFET) in various roles including Device engineering, Design Enablement, PDK development, IP and design Ecosystem. In his latest role, he is Director of Portfolio Management responsible for building a Portfolio of IP, Design Services & full turnkey solutions on GF’s differentiated technology nodes.
5. Japan Foundries' Perspectives on Silicon design democratization, Shiro Hara, Minimal Fab & AIST: Abstract:
Development of current EUV tools and future high NA tools: Overview of development that has enabled current 0.33 NA EUV lithography and work needed to enable the high NA EUV lithography to be successfully implemented.

About Anthony Yen

Anthony Yen is Vice President and Head of Technology Development Center at ASML. He received BSEE from Purdue University and SM, EE, PhD, and MBA from MIT. After receiving his doctorate, he worked at Texas Instruments and at IMEC on assignment from TI. From 1997 to 2017, apart from a three-year stint at Cymer (now part of ASML) leading its marketing organization, he was with TSMC where he first led the development of its lithography processes, and then co-led infrastructure development for next-generation-lithography technologies on assignment at SEMATECH; in his last ten years of career at TSMC, he led the development of EUV lithography, including its mask technology, for high-volume manufacturing. Yen is a Fellow of IEEE and SPIE. He is a recipient of the Frits Zernike Award for Microlithography from SPIE and the Outstanding Electrical and Computer Engineer Award from Purdue University. He serves as a Distinguished Lecturer for the IEEE Electron Devices Society.
6. Google's perspective on Open source PDKs, Open source EDA tools, and OpenMPW shuttle program, Johan Euphrosine and Tim Ansell, Google: Abstract:
Development of current EUV tools and future high NA tools: Overview of development that has enabled current 0.33 NA EUV lithography and work needed to enable the high NA EUV lithography to be successfully implemented.

About Anthony Yen

Anthony Yen is Vice President and Head of Technology Development Center at ASML. He received BSEE from Purdue University and SM, EE, PhD, and MBA from MIT. After receiving his doctorate, he worked at Texas Instruments and at IMEC on assignment from TI. From 1997 to 2017, apart from a three-year stint at Cymer (now part of ASML) leading its marketing organization, he was with TSMC where he first led the development of its lithography processes, and then co-led infrastructure development for next-generation-lithography technologies on assignment at SEMATECH; in his last ten years of career at TSMC, he led the development of EUV lithography, including its mask technology, for high-volume manufacturing. Yen is a Fellow of IEEE and SPIE. He is a recipient of the Frits Zernike Award for Microlithography from SPIE and the Outstanding Electrical and Computer Engineer Award from Purdue University. He serves as a Distinguished Lecturer for the IEEE Electron Devices Society.
7. The Nanofabrication Accelerator Project, Matthew Daniels, NIST: Abstract:
The Nanotechnology Accelerator Program is a public-private partnership between NIST and Google to create a CMOS-based, wafer-scale manufacturing test vehicle for nanofabrication research. The test vehicle is designed to be planarized with alignment marks conventionally used in university nanofabs so that academic and small business researchers can perform basic scientific investigations using an industrially relevant platform that can be seamless integrated into mass production. Supporting up to 40 unique projects, contributors have already developed test structures for artificial intelligence, cryogenic sensing, and bioelectronics. This talk will highlight the challenges and opportunities posed by supporting researchers’ access to foundry resources for manufacturing research and development.

About Matthew Daniels

Matthew Daniels is a research physicist at the National Institute of Standards and Technology (NIST). He received his Ph.D. in theoretical physics from Carnegie Mellon University in 2017 and was a postdoc at the University of Maryland and then NIST before becoming a permanent staff member. His current interests include the manipulation of temporal and stochastic codes for energy efficient compute, the physics of emerging nanodevices, and the design of new digital architectures that accelerate the training of hardware AI platforms.
8. Japanese government perspective on Silicon design democratization, Yohei Ogino, The Ministry of Economy, Trade and Industry METI: Abstract:
Development of current EUV tools and future high NA tools: Overview of development that has enabled current 0.33 NA EUV lithography and work needed to enable the high NA EUV lithography to be successfully implemented.

About Anthony Yen

Anthony Yen is Vice President and Head of Technology Development Center at ASML. He received BSEE from Purdue University and SM, EE, PhD, and MBA from MIT. After receiving his doctorate, he worked at Texas Instruments and at IMEC on assignment from TI. From 1997 to 2017, apart from a three-year stint at Cymer (now part of ASML) leading its marketing organization, he was with TSMC where he first led the development of its lithography processes, and then co-led infrastructure development for next-generation-lithography technologies on assignment at SEMATECH; in his last ten years of career at TSMC, he led the development of EUV lithography, including its mask technology, for high-volume manufacturing. Yen is a Fellow of IEEE and SPIE. He is a recipient of the Frits Zernike Award for Microlithography from SPIE and the Outstanding Electrical and Computer Engineer Award from Purdue University. He serves as a Distinguished Lecturer for the IEEE Electron Devices Society.